Modular memory-like layout for finFET analog designs

US10535774B1 · kind B1 · utility

Assignee

• Marvell International Ltd. · BM

Inventors

• Hui Wang · Beijing, CN
• Runzi Chang · San Jose, US

Key dates

• Filing date: Jun 27, 2018
• Grant date: Jan 14, 2020
• Expiry date: Jun 27, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/834

Abstract

A fin field effect transistor (finFET) includes a semiconductor substrate including at least one fin feature, a diffusion region formed on the semiconductor substrate and extending through the diffusion region, and a gate formed on the diffusion region and the at least one fin feature. The gate includes a split gate structure including a first gate region, a second gate region, a gap separating the first gate region and the second gate region, and a contact region electrically connecting the first gate region and the second gate region. A plurality of source/drain regions are formed in the diffusion region. The plurality of source/drain regions includes a source drain region in the gap between the first gate region and the second gate region. A plurality of pocket dopant regions are formed in the diffusion region. The plurality of pocket dopant regions includes at least one pocket dopant region in the gap between the first gate region and the second gate region.