Thin film transistor and fabricating method thereof, and array substrate
US10535781B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 24, 2018 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | May 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
The disclosure provides a thin film transistor and a fabricating method thereof, and an array substrate. The thin film transistor includes a gate, a first active layer, a second active layer, a first source, a first drain, a second source and a second drain which are provided above a base substrate. The first active layer is located at a side of the gate facing the base substrate, and the second active layer is located at a side of the gate facing away from the first active layer. The first source and the first drain are located at a side of the first active layer facing away from the gate and are connected with the first active layer. The second source and the second drain are located at a side of the second active layer facing away from the gate and are connected with the second active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.