Histogram-based qualification of data used in background or blind calibration of interleaving errors of time-interleaved ADCS
US10536155B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 21, 2018 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Sep 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ADC can include a plurality of time-interleaved ADCs to increase the overall sampling rate of the ADC. Such an ADC can have interleaving errors, since the time-interleaved ADCs in the ADC are not always perfectly matched. One way to calibrate for these mismatches is by observing the digital output signals of the time-interleaved ADCs in the background, or more broadly, without knowledge of the input signal to the ADC (often referred to as “blind” calibration). Due to the nature of these calibrations, the performance of the calibration would significantly degrade when the input signal has certain problematic input conditions, such as a certain coherent input frequency. To address this issue, the data being used for calibration of interleaving errors can go through a qualifying process to assess whether to update error estimates based on the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.