Analog to digital converter and a method for analog to digital conversion
US10536158B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2018 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Feb 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ADC that includes a processing unit configured to receive from first sampling latches N first PWM pulse start counter values and N first PWM pulse end counter value, receive from second sampling latches, N second PWM pulse start counter values and N second PWM pulse end counter value; (c) select a counter that is coupled to a selected sampling latch; (d) calculate an estimated difference between first and second input analog signals based on at least readings of the selected latch. The readings of the selected counter include a first PWM pulse start counter value latched by the selected latch, a first PWM pulse end counter value latched by the selected latch, a second PWM pulse start counter value latched by the selected latch, and a second PWM pulse end counter value latched by the selected latch; and (e) output a digital output signal indicative of the estimated difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.