Thread ownership of keys for hardware-accelerated cryptography
US10536441B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2016 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Oct 20, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/02
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An embedded processor with a cryptographic co-processor operating in a multithreading environment, with inter-thread security for cryptography operations. A secure memory block accessible by the co-processor stores a plurality of key entries, each key entry storing data corresponding to a cryptography key, and a thread owner field that identifies an execution thread is associated with that key. A central processing unit issues a call to the co-processor to execute a cryptography operation along with a key identifier for the key to be used, and a thread identifier indicating the current execution thread. The co-processor compares the thread identifier received from the CPU with the thread owner field of the key entry corresponding to the key identifier. If the thread identifier matches the thread owner in the key entry, the key is retrieved from the secure memory block for use by the co-processor for the cryptography operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.