Secure data erasure verification in hyperscale computing systems
US10536538B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2016 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Sep 22, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2143
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques of implementing out-of-band data erasure verification in computing systems are disclosed herein. In one embodiment, a method includes receiving a verification instruction from a system administrator. In response to and based on the received verification instruction, the method includes selecting a set of persistent storage devices to which data erasure verification is to be performed. The method also includes relaying the verification instruction to additional computing devices in additional enclosures, thereby causing data erasure verification on one or more additional persistent storage devices in the additional enclosures be performed generally in parallel to performing data erasure verification on the subset of persistent storage devices in one of the enclosures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.