High-current PCB traces
US10537016B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2017 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Jul 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09572
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to systems and methods using thermal vias to increase the current-carrying capacity of conductive traces on a multilayered printed circuit board (PCB). In various embodiments, parameters associated with vias may be selected to control various electrical and thermal properties of the conductive trace. Such parameters include the via diameter, a plating thickness, a number of vias, a placement of the vias, an amount of conductive material to be added or removed from the conductive trace, a change in the resistance of the conductive trace, a change in a fusing measurement of the conductive trace, and the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.