Patterned glass layers in electronic devices
US10537023B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2019 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Apr 4, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0195
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic device may include electrical components and other components mounted within an interior of a housing. The device may have a display on a front face of the device and may have a glass layer that forms part of the housing on a rear face of the device. The glass layer may be provided with regions having different appearances. The regions may be textured, may have coatings such as thin-film interference filter coatings formed from stacks of dielectric material having alternating indices of refraction, may have metal coating layers, and/or may have ink coating layers. Textured surfaces may be formed on thin glass layers and polymer films that are coupled to the glass layer. A glass layer may be formed from a pair of coupled glass layers. The coupled layers may have one or more recesses or other structures to visually distinguish different regions of the glass layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.