Efficient work unit processing in a multicore system
US10540288B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2018 |
| Grant date | Jan 21, 2020 |
| Priority date | — |
| Expiry date | Apr 10, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/62
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are described in which a system having multiple processing units processes a series of work units in a processing pipeline, where some or all of the work units access or manipulate data stored in non-coherent memory. In one example, this disclosure describes a method that includes identifying, prior to completing processing of a first work unit with a processing unit of a processor having multiple processing units, a second work unit that is expected to be processed by the processing unit after the first work unit. The method also includes processing the first work unit, and prefetching, from non-coherent memory, data associated with the second work unit into a second cache segment of the buffer cache, wherein prefetching the data associated with the second work unit occurs concurrently with at least a portion of the processing of the first work unit by the processing unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.