Shift-buffer circuit, gate driving circuit, display panel and driving method
US10540938B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2017 |
| Grant date | Jan 21, 2020 |
| Priority date | — |
| Expiry date | Oct 17, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0291
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift-buffer circuit, a gate driving circuit, a display panel, a display device, and a driving method. The shift-buffer circuit includes: a shift register and a plurality of buffers connected with the shift register. The shift register includes a shift output terminal; the shift register is configured to output a shift output signal from the shift output terminal, in response to a shift clock signal; each of the buffers includes a buffer input terminal and a buffer output terminal, the buffer input terminal being connected with the shift output terminal; each of the buffers is configured to output a buffer output signal from the buffer output terminal, in response to a buffer clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.