Semiconductor device and method for manufacturing same
US10541230B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2016 |
| Grant date | Jan 21, 2020 |
| Priority date | — |
| Expiry date | Jun 30, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/1011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first laminated body and a second laminated body. The first laminated body includes sequentially a first element, a first wiring layer, and a first connection layer that includes a first junction electrode, on a main surface of a first substrate. The second laminated body includes sequentially a second element, a second wiring layer, and a second connection layer that includes a second junction electrode, on a main surface of a semiconductor substrate. The first laminated body and the second laminated body are bonded by directly bonding the first junction electrode and the second junction electrode with the two junction electrodes facing each other. A space region is formed at a part of a junction interface between the first laminated body and the second laminated body.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.