Semiconductor device with dummy hole
US10541336B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2017 |
| Grant date | Jan 21, 2020 |
| Priority date | — |
| Expiry date | Mar 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/124
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device may include a base substrate, a first thin-film transistor (“TFT”) provided on the base substrate, a second TFT provided on the base substrate, and a plurality of insulating layers provided on the base substrate to define at least one dummy hole that is not overlapped with the first and second TFTs. The first TFT may include a first input electrode, a first output electrode, a first control electrode, and a first semiconductor pattern including a crystalline semiconductor material, and the second TFT may include a second input electrode, a second output electrode, a second control electrode, and a second semiconductor pattern including an oxide semiconductor material. A shortest distance between the at least one dummy hole and the second semiconductor pattern may be equal to or shorter than 5 micrometers (μm), in a plan view.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.