Adaptive gate-biased field effect transistor for low-dropout regulator
US10545523B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2018 |
| Grant date | Jan 28, 2020 |
| Priority date | — |
| Expiry date | Oct 25, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/618
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A load circuit of a low-dropout (LDO) regulator is disclosed herein according to certain aspects. The load circuit includes a field effect transistor having a source coupled to a supply rail, a gate, and a drain coupled to a gate of a pass transistor of the LDO regulator. The load circuit also includes an adjustable voltage source coupled between the drain and the gate of the field effect transistor, and a voltage control circuit configured to detect a change in a current load through the pass transistor, and to adjust a voltage of the adjustable voltage source based on the detected change in the current load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.