NAND flash memory and method for destroying information from the NAND flash memory
US10546644B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 29, 2017 |
| Grant date | Jan 28, 2020 |
| Priority date | — |
| Expiry date | Dec 29, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present application provides a NAND flash memory, comprising: a control unit, which includes a signal receiving unit, a voltage boosted circuit and a flash array; and a power source supplying power to the control unit; wherein when the voltage boosted circuit receives an erase signal from the signal receiving unit, the voltage boosted circuit exerts a device erase pulse whose magnitude is larger than an initial voltage to blocks of the flash array to permanently erase data in the blocks; the blocks include power-on read blocks. By removing data from at least power-on read blocks, the present invention discloses a scheme for permanently destroying the NAND flash memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.