Flip chip
US10546827B2 · kind B2 · utility
0Cited by
3References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2017 |
| Grant date | Jan 28, 2020 |
| Priority date | — |
| Expiry date | Oct 30, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip chip includes a substrate, an electrode pad layer stacked over the substrate, a passivation layer stacked at both ends of the electrode pad layer, an under bump metallurgy (UBM) layer stacked over the electrode pad layer and the passivation layer, and a bump formed over the UBM layer. The width of an opening on which the passivation layer is not formed over the electrode pad layer is greater than the width of the bump. The flip chip can prevent a crack from being generated in the pad upon ultrasonic bonding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.