Transistor and display device having the same
US10546959B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2017 |
| Grant date | Jan 28, 2020 |
| Priority date | — |
| Expiry date | Jul 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/80
Abstract
A transistor includes a gate electrode, a semiconductor layer overlapping the gate electrode, the semiconductor layer including an oxide semiconductor, and a source electrode and a drain electrode spaced apart from the source electrode, wherein the source and drain electrodes are connected to the semiconductor layer. The semiconductor layer includes a plurality of layers, wherein a crystallinity of a layer of the plurality of layers of the semiconductor layer is a ratio of a crystalline oxide semiconductor, included in the layer of the plurality of layers of the semiconductor layer, to an amorphous oxide semiconductor, included in the layer of the plurality of layers of the semiconductor layer. A first layer of the plurality of layers of the semiconductor layer has a different crystallinity with respect to a second layer of the plurality of layers of the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.