Pixel readout structure and timing to provide fixed pattern noise reduction in image sensors
US10547804B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
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Key dates
| Filing date | Oct 12, 2016 |
| Grant date | Jan 28, 2020 |
| Priority date | — |
| Expiry date | Oct 12, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/79
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for fixed pattern noise reduction in image sensors is disclosed herein. An example method may include simultaneously providing a pixel reference voltage of a pixel to a reference sampling capacitor and a signal sampling capacitor, decoupling the reference sampling capacitor from the pixel, providing a signal voltage to the signal sampling capacitor, and decoupling the signal sampling capacitor from the pixel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.