Reconfigurable analog front-end for integrated receiver and sensor applications
US10551451B2 · kind B2 · utility
2Cited by
1References
20Claims
0Family size
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Key dates
| Filing date | Mar 26, 2018 |
| Grant date | Feb 4, 2020 |
| Priority date | — |
| Expiry date | Mar 26, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R33/3607
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Various approaches of receiving signals in integrated circuitry include implementing two successive stages of signal manipulation and employing an interface having an AC coupling network and buffer circuits for decoupling the output impedance and common-mode level of the first stage of signal manipulation from the input impedance and common-mode level of the second stage of signal manipulation without degrading the performance of either stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.