Patent · US Active

Method and apparatus for scheduling in a non-uniform compute device

US10552152B2 · kind B2 · utility

1Cited by

7References

24Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Jonathan Curtis Beard · Austin, US
Wendy Arnott Elsasser · Austin, US
Eric Van Hensbergen · Austin, US
Stephan Diestelhorst · Dresden, DE

Key dates

Filing date	May 27, 2016
Grant date	Feb 4, 2020
Priority date	—
Expiry date	Apr 20, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/62
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A data processing apparatus, and method of operation thereof, for executing instructions. The apparatus includes one or more host processors, each having a first processing unit, and a multi-level memory system. One or more levels of the memory system are tightly coupled to a corresponding second processing unit. At least one of the host processors includes an instruction scheduler that routes instructions selectively to at least one of the first and second processing units, dependent upon the availability of the processing units and the location, within the memory system, of data to be used when executing the instructions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.