System and method for controlling PCIe direct attached nonvolatile memory storage subsystems
US10552284B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2017 |
| Grant date | Feb 4, 2020 |
| Priority date | — |
| Expiry date | Jul 1, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for controlling power on a PCIe direct attached non-volatile memory storage system are disclosed. In one particular embodiment, the techniques may be realized as a method for controlling power including providing power to a memory attached via the PCIe interface; monitoring a state of the attached memory; determining whether a new operation to be implemented on the attached memory would cause the power provided to the memory to exceed a preset threshold; and stalling execution of the new operation on the attached memory when it is determined that the new operation would exceed the preset threshold while continuing execution of preexisting operations on the attached memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.