Method and electronic device for a mapping table in a solid-state memory
US10552335B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 22, 2015 |
| Grant date | Feb 4, 2020 |
| Priority date | — |
| Expiry date | Feb 9, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a method and electronic device for a mapping table in a solid-state memory, wherein the mapping table comprises a primary mapping table and a secondary mapping table. The method comprises: mapping all logic pages from a host to physical pages of a flash on the solid-state memory in the unit of page to form the secondary mapping table, the secondary mapping table being stored in the flash on the solid-state memory; acquiring a first physical address which is the physical address of a first chunk of the secondary mapping table in the flash of the solid-state memory; and forming and storing the primary mapping table in the flash of the solid-state memory, wherein the first physical address and corresponding first identifying information form a mapping relationship in a mapping element of the primary mapping table, the first identifying information being identifying information of the first chunk.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.