Multi-layer neural network
US10552732B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2016 |
| Grant date | Feb 4, 2020 |
| Priority date | — |
| Expiry date | Sep 12, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/0499
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-layer artificial neural network having at least one high-speed communication interface and N computational layers is provided. N is an integer larger than 1. The N computational layers are serially connected via the at least one high-speed communication interface. Each of the N computational layers respectively includes a computation circuit and a local memory. The local memory is configured to store input data and learnable parameters for the computation circuit. The computation circuit in the ith computational layer provides its computation results, via the at least one high-speed communication interface, to the local memory in the (i+1)th computational layer as the input data for the computation circuit in the (i+1)th computational layer, wherein i is an integer index ranging from 1 to (N−1).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.