Patent · US Active

Method for controlling a check node of a NB-LDPC decoder and corresponding check node

US10554226B2 · kind B2 · utility

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Key dates

Filing dateApr 22, 2016
Grant dateFeb 4, 2020
Priority date
Expiry dateMay 30, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/458
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Some embodiments are directed to a method for controlling a check node of a NB-LDPC decoder. The check node receives dc input lists Ui and delivers and delivers dc output lists Vi, with i∈[1 . . . dc]. Each input list and output list includes nm elements and each element of the input or output lists includes a reliability value associated to a symbol of a Galois Field GF(q) with q>nm. The input elements and output elements are sorted according to the reliability values in the lists. The method is a syndrome-based method. The syndromes are sums of dc elements of input lists Ui. The method includes a step of syndrome calculation, a step of decorrelation and a step for generating the output list.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.