Method and device for transfer of data to or from a memory
US10558587B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 28, 2017 |
| Grant date | Feb 11, 2020 |
| Priority date | — |
| Expiry date | Nov 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for reading or writing data at an address of a memory is disclosed. The data includes a number of consecutive words that each has a plurality of bits. The words are transferred to or from the memory in synchronization with a clock signal so that each word is transferred in one cycle of the clock signal. The bits are scrambled or unscrambled by applying a logic function to the bits of each word. The logic function is identical for the scrambling and the unscrambling and makes use of a bit-key that is dedicated to the word and is identical for the scrambling and the unscrambling. Each bit-key comes from a pseudo-random series generated based on the address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.