Array substrate and display panel
US10559270B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2017 |
| Grant date | Feb 11, 2020 |
| Priority date | — |
| Expiry date | Dec 1, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0452
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate includes three first conductive lines, three second conductive lines, and four switches. The three first conductive lines are sequentially and consecutively arranged along a direction, and the three second conductive lines are sequentially and consecutively arranged along another direction and intersect the first conductive lines. The four switches are respectively connected to the corresponding first conductive lines and the corresponding second conductive lines. Two of the switches are connected to the second one of the first conductive lines and are substantially located between two adjacent second conductive lines, and the other two of the switches are not connected to the second one of the first conductive lines and are substantially located between the other two adjacent second conductive lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.