Patent · US Active

Hybrid non-volatile memory devices with static random access memory (SRAM) array and non-volatile memory (NVM) array

US10559344B2 · kind B2 · utility

2Cited by
6References
20Claims
0Family size

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Inventors

Key dates

Filing dateSep 14, 2017
Grant dateFeb 11, 2020
Priority date
Expiry dateJan 3, 2038

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Technologies are generally described herein for a hybrid non-volatile memory structure that includes a number of SRAM buffers. SRAM access times may be achieved for non-volatile read/write operations by performing access queue buffered read/write operations first. The SRAM buffer may be shareable as a system SRAM. In other examples, a hybrid non-volatile memory according to some embodiments may include a high speed block and a high endurance block to store different types of data with different access needs. The hybrid non-volatile memory may also include a normal block to store the data which is non-frequently changed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.