Shift register circuit, gate driving circuit, display apparatus and method for driving the same
US10559372B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 15, 2019 |
| Grant date | Feb 11, 2020 |
| Priority date | — |
| Expiry date | Jul 15, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/041
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register circuit includes a first output sub-circuit, and a second output sub-circuit. The first output sub-circuit is coupled to a clock signal terminal, a control signal terminal, a pull-up node and an output signal terminal, and is configured to output a clock signal output via the clock signal terminal to the output signal terminal under control of the control signal output via a control signal terminal and the potential of the pull-up node. The second output sub-circuit is coupled to the clock signal terminal, the pull-up node and the output signal terminal, and is configured to output the clock signal to the output signal terminal under control of the potential of the pull-up node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.