Series circuit arrangement of power semiconductors
US10559519B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2017 |
| Grant date | Feb 11, 2020 |
| Priority date | — |
| Expiry date | Jan 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/53854
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to semiconductors. Some embodiments may include a series circuit arrangement of power semiconductors comprising: cooling-water boxes arranged on the semiconductors and electrically connected to them; two cooling-water distributor lines; respective branchings on the cooling-water distributor lines for the cooling chambers; and a control electrode arranged on the cooling-water distributor lines. The cooling chambers are connected in parallel between the cooling-water distributor lines with respect to a cooling-water stream. The cooling chambers are connected to the branchings via a respective connecting line. For at least some of the cooling chambers, the branchings on the cooling-water distributor lines are arrayed relative to the position of the respective cooling chamber in offset manner in relation to a geometrically shortest possible link to the cooling-water distributor lines, so that a difference of potential between the cooling chambers and the branchings is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.