Patent · US Active

Trench capacitor with warpage reduction

US10559650B2 · kind B2 · utility

2Cited by

1References

20Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

Jiao Jia · Chengdu, CN
Zhipeng Feng · Beijing, CN
He Lin · Frisco, US
Yunlong Liu · Chengdu, CN
Manoj Kumar Jain · Austin, US

Key dates

Filing date	Jul 6, 2018
Grant date	Feb 11, 2020
Priority date	—
Expiry date	Jul 6, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH10D30/66
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A trench capacitor includes a plurality of trenches in a doped semiconductor surface layer of a substrate. At least one dielectric layer lines a surface of the plurality of trenches. A second polysilicon layer that is doped is on a first polysilicon layer that is on the dielectric layer which fills the plurality of trenches. The second polysilicon layer has a higher doping level as compared to the first polysilicon layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.