Semiconductor package structure
US10559728B2 · kind B2 · utility
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19Claims
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Assignee
Inventors
Key dates
| Filing date | Aug 27, 2018 |
| Grant date | Feb 11, 2020 |
| Priority date | — |
| Expiry date | Aug 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09063
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor package structure is disclosed. The package structure includes a first substrate, a second substrate on which the first substrate is disposed, and a semiconductor chip which is disposed on the first substrate. The two substrates can include two notches or two solder receiving portions. Therefore, when the package structure is disposed on the printed circuit board (PCB), the package structure will protrude less on the surface of the printed circuit board (PCB); or, the solders on the printed circuit board (PCB) will not be shifted by the package structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.