Elementary check node processing for syndrome computation for non-binary LDPC codes decoding
US10560120B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2017 |
| Grant date | Feb 11, 2020 |
| Priority date | — |
| Expiry date | Apr 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6555
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
At least a method and an apparatus are presented to decode a signal encoded using an error correcting code. For example, a decoder comprising a check node processing unit is presented. The check node processing unit is configured to receive at least three input messages and to generate at least one output message. A syndrome calculator is configured to determine a set of syndromes from the at least three input messages using at least two elementary check node processors. A decorrelation unit is configured to determine, in association with at least an output message, a set of candidate components from the set of syndromes. A selection unit is configured to determine at least an output message by selecting components comprising distinct symbols from the set of candidate components associated with the at least an output message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.