Patent · US Active

Process for electrochemically making at least one porous area of a micro and/or nanoelectronic structure

US10563319B2 · kind B2 · utility

0Cited by

4References

32Claims

0Family size

Assignee

Comissariat a l'Energie Atomique et aux Energies Alternatives · FR

Inventors

Eric Ollier · Grenoble, FR
Frederic Gaillard · Grenoble, FR
Carine Marcoux · Voiron, FR

Key dates

Filing date	Oct 15, 2014
Grant date	Feb 18, 2020
Priority date	—
Expiry date	Nov 15, 2036

Classification

Technology area (CPC B)Performing Operations; Transporting
CPC primaryB81C2201/0115
WIPO fieldSurface technology, coating
WIPO sectorChemistry

Abstract

A process for making at least one porous area (ZP) of a microelectronic structure in at least one part of an conducting active layer (6), the active layer (6) forming a front face of a stack, the stack comprising a back face (2) of conducting material and an insulating layer (4) interposed between the active layer (6) and the back face (2), said process comprising the steps of:

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.