System and method for operating a microcomputer in sleep-mode and awake mode with low power event processing
US10564701B2 · kind B2 · utility
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Key dates
| Filing date | Dec 15, 2015 |
| Grant date | Feb 18, 2020 |
| Priority date | — |
| Expiry date | May 26, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Microcomputer with a sleep mode system uses a non-volatile memory stack for saving system variables, then switches the microcomputer completely off to go into sleep-mode. In sleep-mode, the microcomputer sleep mode system uses a low powered clock and sensors to trigger time events and device events that power up the microcomputer when needed. When in awake-mode, the microcomputer logs any data from connected device(s). The microcomputer turns on an internet radio and transmits data logged, updates its clock time and receives any configuration updates before powering back down into sleep-mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.