Patent · US Active

Dynamic configuration and peripheral access in a processor

US10565132B2 · kind B2 · utility

1Cited by
1References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 17, 2017
Grant dateFeb 18, 2020
Priority date
Expiry dateJul 17, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1052
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In various implementations, a system includes a memory, a processor, and an execution-aware memory protection unit (EA-MPU). The EA-MPU is configured to regulate memory access by the processor based at least on the identity of a subject executable that requests access, and on the address to which access is requested, and on permissions information that identifies which subject executables are to be granted access to each of several memory regions. In various implementations, the permissions information itself is stored among the several memory regions. Various configurations of the permissions information can be used to provide shared memory regions for communication among two or more stand-alone trusted software modules, to protect access to devices accessible through memory-mapped I/O (MMIO), to implement a flexible watchdog timer, to provide security for software updates, to provide dynamic root of trust measurement services, and/or to support an operating system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.