Reverse debugging of software failures
US10565511B1 · kind B1 · utility
3Cited by
2References
14Claims
0Family size
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Key dates
| Filing date | Oct 1, 2018 |
| Grant date | Feb 18, 2020 |
| Priority date | — |
| Expiry date | Oct 1, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N5/027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Debugging systems are configured to resolve both memory aliasing conditions in which a write instruction is directed to an unknown destination address, and concurrency conditions in which control flow information is collected for multiple, concurrently executing threads. Recorded state values corresponding to an application's prior execution and control flow information are both obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.