Wireless communication using codebooks from a QC-LDPC code for shorter processing latency and improved decoder throughput efficiency
US10567116B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2018 |
| Grant date | Feb 18, 2020 |
| Priority date | — |
| Expiry date | Jun 23, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0068
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A processor of an apparatus selects a codebook from a plurality of codebooks embedded in a quasi-cyclic-low-density parity-check (QC-LDPC) code. The processor stores the selected codebook in a memory associated with the processor. The processor also encodes data using the selected codebook to generate a plurality of modulation symbols of the data. The processor further controls a transmitter of the apparatus to multiplex, convert, filter, amplify and radiate the modulation symbols as electromagnetic waves through one or more antennas of the apparatus. In selecting the codebook from the plurality of codebooks embedded in the QC-LDPC code, the processor selects the codebook according to one or more rules such that a small codebook requiring a shorter amount of processing latency for the encoding is selected for the encoding unless a larger codebook corresponding to a larger amount of processing latency for the encoding is necessary for the encoding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.