Increased parallelization efficiency in tiering environments
US10572386B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2018 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | Sep 12, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/825
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method, according to one embodiment, includes: receiving an operation request which corresponds to a given object, identifying multiple block addresses which are associated with the given object, determining whether any one or more of the identified block addresses have a token currently issued thereon, and combining the multiple block addresses to a first set in response to determining that at least one token is currently issued on one or more of the identified block addresses. A first portion of the block addresses determined as having a token currently issued thereon is transitioned to a second set. A remaining portion of the block addresses is also divided into equal chunks. The chunks are allocated in the first set across parallelization units, and the block addresses in the second set are divided into equal chunk. Furthermore, the chunks in the second set are allocated to a dedicated parallelization unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.