Electro-static discharge assembly with semiconductor layer, array substrate and fabrication method thereof, and display panel
US10573640B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 5, 2017 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | May 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/131
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An electro-static discharge assembly, an array substrate and a fabrication method thereof, and a display panel are provided. The electro-static discharge assembly includes: a base substrate; a semiconductor layer, a first insulating layer, a first auxiliary electrode, a first electrode and a second electrode provided on the base substrate, wherein the first electrode and the second electrode are spaced apart from each other and are respectively in contact with the semiconductor layer, the first auxiliary electrode is in contact with one of the first electrode and the second electrode, and the first insulating layer is provided between the first auxiliary electrode and both the first electrode and the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.