Catalyst layer, method for producing the same, membrane electrode assembly and electrochemical cell
US10573897B2 · kind B2 · utility
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4References
12Claims
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Key dates
| Filing date | Sep 10, 2015 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | Sep 10, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure aim to provide a catalyst layer ensuring a high cell voltage and having both excellent robustness and sufficient endurance, and also to provide a process for producing the layer, a membrane electrode assembly and an electrochemical cell. The catalyst layer comprises two or more noble metal-containing layers, and a porous ceramic layer placed between the noble metal-containing layers. Further, in the catalyst layer, voids exist between the porous ceramic layer and the noble metal-containing layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.