Digital calibration systems and methods for multi-stage analog-to-digital converters
US10574250B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2019 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | Feb 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/502
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Digital calibration systems and related methods are disclosed for multi-stage analog-to-digital converters (ADCs). For one embodiment, a multi-stage ADC includes an initial ADC, an additional ADC, and calibration logic. The initial ADC generates an output signal and N-bit digital values that are based upon an input signal. The additional ADC receives the output signal from the initial ADC and generates M-bit digital values that are based upon the output signal. The calibration logic receives the N-bit digital values and the M-bit digital values and generates correction values. The correction values are based upon differences between maximum values and minimum values for M-bit digital values associated with different regions determined by the N-bit digital values. Digital conversion outputs for the multi-stage ADC are provided as combinations of the N-bit digital values and the M-bit digital values corrected with the correction values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.