Ordering of memory device mapping to reduce contention
US10585791B2 · kind B2 · utility
0Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2018 |
| Grant date | Mar 10, 2020 |
| Priority date | — |
| Expiry date | Apr 27, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of a semiconductor apparatus may include technology to determine a differentiator associated with an access request for two or more memory devices, and set a target order for the two or more memory devices based on the differentiator. Other embodiments are disclosed and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.