Synchronizing write operations
US10586056B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2017 |
| Grant date | Mar 10, 2020 |
| Priority date | — |
| Expiry date | Nov 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes determining, by a persistent memory lockstep unit of a hardware security module, that a first processor is attempting to change a state of the hardware security module. The method also includes determining, by the persistent memory lockstep unit, whether a second processor has attempted the same change. The method also includes preventing the change until both the first processor and the second processor have attempted the same change. The method also includes permitting the change to the state of the hardware security module based on a determination that both the first processor and the second processor have both attempted the same change.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.