Patent · US Active

3D-microstrip branchline coupler

US10586752B2 · kind B2 · utility

0Cited by
9References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 5, 2018
Grant dateMar 10, 2020
Priority date
Expiry dateJun 5, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01Q13/106
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

The disclosure is directed to semiconductor structures and, more particularly, to a three dimensional microstrip branchline coupler and methods of manufacture. The structure includes a plurality of through silicon vias and conductive lines electrically connected to a first end and a second end of respective ones of the plurality of through silicon vias. A first through silicon via of the plurality of through silicon vias forms a first port of a three dimensional (3D) branchline coupler. A second through silicon via of the plurality of through silicon vias forms a second port of the 3D branchline coupler. A third through silicon via of the plurality of through silicon vias forms a third port of the 3D branchline coupler. A fourth through silicon via of the plurality of through silicon vias forms a fourth port of the 3D branchline coupler.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.