Array substrate and display device
US10591790B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2017 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Jan 8, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate and a display device are provided, which relate to the field of display and are for alleviating or mitigating the problem of bad contact between the pixel electrode and the drain pad caused by deep via holes. The array substrate includes a plurality of pixel units, each including a drain pad, a pixel electrode and an insulating layer above the drain pad. The drain pad has a first via hole, and the insulating layer has a second via hole that exposes at least a portion of the first via hole and a portion of the drain pad around the first via hole. The pixel electrode extends along an inner wall of the second via hole and contacts the exposed portion of the drain pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.