Power management with hardware virtualization
US10591980B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 4, 2016 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Jan 4, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This application discloses a computing system that can enter into a low power mode, shut down all components except for memory, and exit from the low power mode and restore running programs where they left off before entering the low power mode. To enter the low power mode, a processing device, in a user mode, can store program information to a memory. The processing device can switch to a hypervisor mode and store processor state information to a reserved portion of the main memory. The computing system can then disable hardware components of the computing system. To exit the low power mode, the computing system can enable the hardware components of the computing system, and activate the hypervisor mode of the processing device, allowing retrieval of the processor state information. The processing device can switch to the user mode and load stored the program information from the main memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.