Memory optimization by phase-dependent data residency
US10592272B2 · kind B2 · utility
0Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2019 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Mar 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/70
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide memory optimization by phase-dependent data residency. Application programs are profiled a priori or in real time for temporal memory usage. Memory regions such as initialization data are proactively removed from memory when the application transitions to a new phase. A hypervisor monitors application activity and coordinates the removal of memory regions that are no longer needed by the application. Additionally, memory regions that are anticipated to be needed in the future are proactively preloaded.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.