Patent · US Active

Arbitrating circuitry and method

US10592439B2 · kind B2 · utility

1Cited by

5References

13Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Andrew David Tune · Sheffield, GB
Peter Andrew Riocreux · Sheffield, GB
Alessandro Grande · Geneva, CH

Key dates

Filing date	Apr 17, 2019
Grant date	Mar 17, 2020
Priority date	—
Expiry date	Apr 17, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/14
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Arbitrating circuitry arbitrates between a plurality of inputs and a selection of at least one of said plurality of inputs. The arbitrating circuitry includes an array of interconnected arbiter devices operating with respect to a set of Q inputs. The array comprises M sub-levels with at least a first sub-level having T arbiter devices each operating with respect to U inputs, where Q=UM and Q=TU. For each sub-level other than a first sub-level, each arbiter device in a sub-level receives as input requests signals indicating an arbitration outcome for two or more arbiter devices in a preceding sub-level and arbitrates between those input requests.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.