Node controller direct socket group memory access
US10592465B2 · kind B2 · utility
4Cited by
5References
11Claims
0Family size
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Key dates
| Filing date | Oct 26, 2017 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Apr 18, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A node controller for a first processor socket group may include a node memory storing a coherence directory and logic. Logic may cause the node controller to: receive a memory operation request directly from a second processor socket group, follow a coherence protocol based on the memory operation request and the coherence directory and directly access a socket group memory of the first processor socket group based on the request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.