Compensation circuit in which a magnitude relationship between channel width-to-length ratios of driving transistors of any two sub-pixels is identical with a magnitude relationship between channel width-to-length ratios of two sense transistors corresponding to the two sub-pixels, manufacturing method thereof, pixel circuit, compensation device and display device
US10593265B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2018 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Jan 16, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/043
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A compensation circuit and a manufacturing method thereof, a pixel circuit, a compensation device and a display device are disclosed. The OLED compensation circuit includes at least two sense transistors, the at least two sense transistors are in one-to-one correspondence with at least two sub-pixels in a pixel, and a first electrode of each of the sense transistors is electrically connected to a driving transistor of corresponding one of the sub-pixels; a magnitude relationship between channel width-to-length ratios of driving transistors of any two sub-pixels of the at least two sub-pixels is identical with a magnitude relationship between channel width-to-length ratios of two sense transistors corresponding to the two sub-pixels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.