Capacitive logic cell
US10593485B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2018 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Jul 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A logic cell including a fixed assembly including a first electrode, a mobile assembly including a second electrode, and third, fourth, and fifth electrodes, wherein: the first, second, third, fourth, and fifth electrodes are insulated from one another; the first and second electrodes define a capacitor variable according to the position of the mobile assembly relative to the fixed assembly; the third electrode is connected to a node of application of a first logic input signal; the fourth electrode is connected to a node of application of a second logic input signal; the fifth electrode is connected to a reference node; and the position of the second electrode relative to the first electrode is a function of a combination of the first and second logic input signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.